armv6-m architecture reference manual
preface
about this manual ............................................................................... xvi
using this manual .............................................................................. xvii
conventions ........................................................................................ xix
additional reading ................................................................................ xx
feedback ............................................................................................ xxi
part a application level architecture
chapter a1 introduction
a1.1 about the arm architecture profiles .............................................. a1-26
a1.2 privileged and unprivileged execution ............................................ a1-27
chapter a2 application level programmers’ model
a2.1 about the application level programmers’ model ........................... a2-30
a2.2 arm processor data types and arithmetic ..................................... a2-31
a2.3 registers and execution state ........................................................ a2-36
a2.4 exceptions, faults and interrupts .................................................... a2-39
a2.5 coprocessor support ...................................................................... a2-40
chapter a3 arm architecture memory model
a3.1 address space ............................................................................... a3-42
a3.2 alignment support .......................................................................... a3-43
a3.3 endian support ............................................................................... a3-44
a3.4 synchronization and semaphores .................................................. a3-47
a3.5 memory types and attributes and the memory order model .......... a3-48
a3.6 access rights .................................................................................. a3-56
a3.7 memory access order .................................................................... a3-58
a3.8 caches and memory hierarchy ...................................................... a3-63
chapter a4 the armv6-m instruction set
a4.1 about the instruction set ................................................................ a4-66
a4.2 unified assembler language ......................................................... a4-68
a4.3 branch instructions ........................................................................ a4-70
a4.4 data-processing instructions .......................................................... a4-71
a4.5 status register access instructions ................................................ a4-74
a4.6 load and store instructions ............................................................ a4-75
a4.7 load multiple and store multiple instructions ................................ a4-77
a4.8 miscellaneous instructions ............................................................. a4-78
a4.9 exception-generating instructions .................................................. a4-79
chapter a5 the thumb instruction set encoding
a5.1 thumb instruction set encoding ..................................................... a5-82
a5.2 16-bit thumb instruction encoding ................................................. a5-84
a5.3 32-bit thumb instruction encoding ................................................. a5-91
chapter a6 thumb instruction details
a6.1 format of instruction descriptions .................................................. a6-94
a6.2 standard assembler syntax fields .................................................. a6-98
a6.3 conditional execution ..................................................................... a6-99
a6.4 shifts applied to a register ........................................................... a6-101
a6.5 memory accesses ........................................................................ a6-103
a6.6 hint instructions ........................................................................... a6-104
a6.7 alphabetical list of armv6-m thumb instructions ........................ a6-105
part b system level architecture
chapter b1 system level programmers’ model
b1.1 introduction to the system level ................................................... b1-204
b1.2 about the armv6-m memory mapped architecture ..................... b1-205
b1.3 overview of system level terminology and operation ................... b1-206
b1.4 registers ...................................................................................... b1-211
b1.5 armv6-m exception model .......................................................... b1-218
chapter b2 system memory model
b2.1 about the system memory model ................................................. b2-246
b2.2 declarations and support functions .............................................. b2-247
b2.3 memory accesses ........................................................................ b2-251
b2.4 control of the endianness model in armv6-m ............................. b2-254
b2.5 barrier support for system correctness ........................................ b2-255
chapter b3 system address map
b3.1 the system address map ............................................................. b3-258
b3.2 system control space (scs) ....................................................... b3-262
b3.3 the system timer, systick ........................................................... b3-275
b3.4 nested vectored interrupt controller, nvic ................................. b3-281
b3.5 protected memory system architecture, pmsav6 ....................... b3-289
chapter b4 armv6-m system instructions
b4.1 about the armv6-m system instructions ..................................... b4-304
b4.2 armv6-m system instruction descriptions ................................... b4-305
part c debug architecture
chapter c1 armv6-m debug
c1.1 introduction to armv6-m debug .................................................. c1-316
c1.2 the debug access port ............................................................... c1-318
c1.3 overview of the armv6-m debug features .................................. c1-320
c1.4 debug and reset .......................................................................... c1-323
c1.5 debug event behavior .................................................................. c1-324
c1.6 debug register support in the scs .............................................. c1-328
c1.7 the data watchpoint and trace unit ........................................... c1-341
c1.8 breakpoint unit ............................................................................ c1-351
part d appendices
appendix a armv6-m coresight infrastructure ids
a.1 coresight infrastructure ids for an armv6-m implementation .................
appxa-360
appendix b deprecated and obsolete features
b.1 deprecated features of the armv6-m architecture ................ appxb-364
b.2 obsolete features of the armv6-m architecture .................... appxb-365
appendix c armv7-m differences
c.1 armv6-m and armv7-m compatibility .................................. appxc-368
c.2 about the armv6-m and armv7-m architecture profiles ...... appxc-369
c.3 instruction support ................................................................. appxc-370
c.4 programmers’ model support ................................................. appxc-371
c.5 memory model support .......................................................... appxc-373
c.6 system control space register support ................................. appxc-375
c.7 debug support ....................................................................... appxc-377
appendix d legacy instruction mnemonics
d.1 thumb instruction mnemonics ............................................... appxd-380
d.2 pre-ual pseudo-instruction nop .......................................... appxd-384
appendix e pseudocode definition
e.1 instruction encoding diagrams and pseudocode ................... appxe-386
e.2 limitations of pseudocode ..................................................... appxe-388
e.3 data types .............................................................................. appxe-389
e.4 expressions ........................................................................... appxe-393
e.5 operators and built-in functions ............................................. appxe-395
e.6 statements and program structure ........................................ appxe-401
e.7 miscellaneous helper procedures and functions .................... appxe-406
appendix f pseudocode index
f.1 pseudocode operators and keywords .................................... appxf-410
f.2 pseudocode functions and procedures .................................. appxf-414
appendix g register index
g.1 arm core registers ............................................................... appxg-422
g.2 memory mapped system registers ........................................ appxg-423
g.3 memory mapped debug registers ......................................... appxg-424
glossary
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