arm rvds 调试器（rvd）目标配置手册4.1 -澳门皇冠贵宾会网址

realview debugger target configuration guide

chapter 1 introduction

1.1 about connection configuration ............................................................................... 1-2
1.2 default configuration files ........................................................................................ 1-7
1.3 how configuration files are linked together ............................................................ 1-13
1.4 what the configuration files contain ....................................................................... 1-14
1.5 locating the configuration files .............................................................................. 1-16
1.6 summary of supplied bcd files ............................................................................. 1-19

chapter 2 customizing a debug interface configuration

2.1 about customizing a debug interface configuration ................................................ 2-2
2.2 about customizing a dstream or realview ice debug interface configuration .. 2-3
2.3 customizing a dstream or realview ice debug interface configuration for non-coresight development platforms .................................................................... 2-7
2.4 customizing a dstream or realview ice debug interface configuration for development platforms containing coresight components ..................................... 2-9
2.5 customizing a vstream debug interface configuration ..................................... 2-11
2.6 customizing an rviss debug interface configuration .......................................... 2-13
2.7 customizing an issm debug interface configuration ............................................ 2-17
2.8 customizing an rtsm debug interface configuration ........................................... 2-19
2.9 customizing a model library debug interface configuration ................................. 2-21
2.10 customizing a model process debug interface configuration ............................... 2-23
2.11 customizing a soc designer debug interface configuration ................................ 2-25

chapter 3 customizing a debug configuration

3.1 about customizing a debug configuration .............................................................. 3-2
3.2 viewing the connection properties .......................................................................... 3-5
3.3 changing connection settings ................................................................................ 3-10
3.4 loading a different board file ................................................................................. 3-15
3.5 hiding a debug configuration ................................................................................ 3-18
3.6 specifying connect and disconnect mode ............................................................. 3-19
3.7 creating a target-specific advanced_information group ........................................ 3-23
3.8 configuring vector catch ........................................................................................ 3-24
3.9 configuring semihosting ........................................................................................ 3-29
3.10 configuring the cli commands for hardware cross-triggering .............................. 3-33
3.11 configuring a connection sequence for multiple targets ........................................ 3-36
3.12 running cli commands automatically on connection ........................................... 3-41
3.13 configuring realmonitor for connections through dstream or realview ice ... 3-43
3.14 flash programming ................................................................................................ 3-50
3.15 using the thumb-2ee helper macro ..................................................................... 3-51
3.16 restoring the default connections and configurations ........................................... 3-55
3.17 preparing debug configurations for distribution .................................................... 3-56
3.18 distributing debug configurations to other machines and users ........................... 3-58
3.19 example of setting up an integrator board and processor core module ................ 3-60
3.20 troubleshooting debug configurations ................................................................. 3-65

chapter 4 configuring custom memory maps, registers and peripherals

4.1 about configuring custom memory maps, registers, and peripherals ...................... 4-2
4.2 assigning a board, chip, or component group to a debug configuration ................ 4-7
4.3 using the supplied bcd files ................................................................................. 4-12
4.4 creating a bcd file to use as a template ............................................................... 4-13
4.5 basic procedure for creating bcd files .................................................................. 4-15
4.6 creating a new bcd file ........................................................................................ 4-16
4.7 creating and naming a board, chip, or component group ..................................... 4-18
4.8 assigning board/chip definitions ............................................................................ 4-21
4.9 setting top of memory ............................................................................................ 4-24
4.10 creating a memory map block ............................................................................... 4-29
4.11 creating an enumeration for setting register values .............................................. 4-35
4.12 creating a custom memory mapped register ......................................................... 4-37
4.13 creating a custom peripheral ................................................................................. 4-40
4.14 creating the register tab for displaying custom registers and peripherals ............. 4-44
4.15 creating memory map rules .................................................................................. 4-47
4.16 setting up controlled memory blocks ..................................................................... 4-49
4.17 creating a concatenated register ........................................................................... 4-54
4.18 troubleshooting bcd files ..................................................................................... 4-58

chapter 5 debug configuration tutorial

5.1 about the debug configuration tutorial .................................................................... 5-2
5.2 before starting the tutorial ........................................................................................ 5-5
5.3 creating a new debug configuration ....................................................................... 5-6
5.4 configuring the new debug configuration ............................................................... 5-7
5.5 creating the etherrouter.bcd file ............................................................................ 5-8
5.6 creating the amdlance.bcd file .......................................................................... 5-10
5.7 creating the etherrouter board group ............................................................... 5-11
5.8 creating the amdlance chip group .................................................................. 5-12
5.9 assigning board/chip definitions ............................................................................ 5-13
5.10 creating the memory map ..................................................................................... 5-15
5.11 creating the enumerations for the register values ................................................. 5-19
5.12 creating a custom register ..................................................................................... 5-21
5.13 creating the register tab for displaying custom registers ....................................... 5-24
5.14 setting up controlled memory map blocks ............................................................. 5-27
5.15 creating memory map rules .................................................................................. 5-29
5.16 displaying the controlled memory map blocks ...................................................... 5-31
5.17 creating a concatenated register ........................................................................... 5-33

chapter 6 programming flash with realview debugger

6.1 introduction to flash programming with realview debugger .................................. 6-2
6.2 realview debugger files used for flash programming ........................................... 6-7
6.3 pakflash utility command syntax ............................................................................ 6-10
6.4 programming flash on the arm development boards .......................................... 6-11
6.5 programming flash for a custom development platform ....................................... 6-16
6.6 gathering information about your development platform ....................................... 6-19
6.7 creating algorithms for a flash type supported by realview debugger ............... 6-20
6.8 creating algorithms for a flash type not provided with realview debugger ......... 6-23
6.9 creating the flash-level and board-level ame files ............................................... 6-29
6.10 generating the fme file ......................................................................................... 6-34
6.11 checking the fme file with the dispflash utility ...................................................... 6-38
6.12 creating a bcd file ................................................................................................ 6-39
6.13 programming an image into flash ......................................................................... 6-44
6.14 troubleshooting ..................................................................................................... 6-46

appendix a connection properties reference

a.1 about connection properties reference .................................................................... a-2
a.2 debug configuration generic groups and settings ................................................... a-6
a.3 debug configuration advanced_information settings reference ........................... a-10
a.4 memory mapping advanced_information settings reference ................................ a-20

appendix b issm configuration reference

b.1 cortex-a8 model configuration ................................................................................ b-2
b.2 cortex-m0 model configuration .............................................................................. b-10
b.3 cortex-m1 model configuration .............................................................................. b-17
b.4 cortex-m3 model configuration .............................................................................. b-25
b.5 cortex-r4 model configuration .............................................................................. b-33